Course

ESY - Embedded Systems in Media Technology

PDF Course Catalog Deutsche Version: ESY

Version: 2 | Last Change: 29.09.2019 20:07 | Draft: 0 | Status: vom verantwortlichen Dozent freigegeben

Long name Embedded Systems in Media Technology
Approving CModule ESY_MaMT
Responsible
Prof. Dr.-Ing. Dirk Poggemann
Professor Fakultät IME
Level Master
Semester in the year winter semester
Duration Semester
Hours in self-study 78
ECTS 5
Professors
Prof. Dr.-Ing. Dirk Poggemann
Professor Fakultät IME
Requirements none
Language German, English if necessary
Separate final exam Yes
Literature
H.Flügel, FPGA-Design mit Verilog, Oldenbourg
D.G.Bailey, Design for Embedded Image Processing on FPGAs, Wiley
F.Kesel, Entwurf von digitalen Schaltungen und Systemen mit HDLs und FPGAs, Oldenbourg
Final exam
Details
Students implement media technology algorithms in an Embedded System and document their results. The Implementation should be developed and tested as introduced in the lecture and the lab exercises.
Minimum standard
Working Algorithm
Exam Type
Students implement media technology algorithms in an Embedded System and document their results. The Implementation should be developed and tested as introduced in the lecture and the lab exercises.

Learning goals
Knowledge
- Microprocessors
- FPGAs
- Hardware Description Languages
- Designprocess
- Test and Debug
- Control of CCD- and CMOS-Image-Sensors
- Image Processing Algorithms
Expenditure classroom teaching
Type Attendance (h/Wk.)
Lecture 2
Tutorial (voluntary) 0
Special literature
keine/none
Special requirements
none
Accompanying material
electronic slides as presented during lectures
Separate exam
none

Learning goals
Skills
exercises with FPGA-Board and CMOS-Image-Sensor
Expenditure classroom teaching
Type Attendance (h/Wk.)
Practical training 2
Tutorial (voluntary) 0
Special literature
keine/none
Special requirements
none
Accompanying material
electronic description of lab-excercises
Separate exam
Exam Type
working on practical scenarion (e.g. in a lab)
Details
Reports about lab exercises
Minimum standard
Reports for all lab excercises must be delivered in correct form with correct results

Impressum
Datenschutzhinweis
Haftungshinweis
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