Long name	Systems on Programmable Chips
Approving CModule	SOP_BaTIN
Responsible	Prof. Dr. Tobias Krawutschke Professor Fakultät IME
Level	Bachelor
Semester in the year	summer semester
Duration	Semester
Hours in self-study	78
ECTS	5
Professors	Prof. Dr. Tobias Krawutschke Professor Fakultät IME
Requirements	Fundamentals of digital systems * Design Methods (Boolean Algebra, Automata) * Basic knowledge of digital technology including hardware description language Fundamentals Programming * Hardwareoriented Programming with C * Programming experience * Knowledge and first experiences in reactive programming, especially using interrupts Fundamentals of signal processing, esp. digital filters (FIR)
Language	German, English if necessary
Separate final exam	Yes

1) Digital system modelling using
Boolean algebra
Schematic (using digital basic components)
Finite State Automata (FSA)
Extended FSA, Statecharts
Controlflow/Dataflow systems
VHDL
2) Digital technology
Understanding of typical digital circuits (CMOS technology)
Understanding, description and classification of runtime effects
Knowledge and variants of programmable units (PLD, FPGA)
3) SoC/SoPC-Systeme
System construction
IO access using machine-near programming
Interrupts, alarm
Programming automata / CFDF systems
Rules to partition hardware and software components
Design of coupling of HW/SW components

Type	Attendance (h/Wk.)
Lecture	2
Exercises (whole course)	1
Exercises (shared course)	0
Tutorial (voluntary)	2

none

Getting compentencies in analysis, modelling and implementation of the hardware part of an audio signal processing system
1) Analysis of interface to the CoDec and creation of a system reading in and writing out samples (copy-machine)
2) Development of a FIR filter working on the samples
3) Development of a simple echo producer working in the time domain

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Getting compentencies in analysis, modelling and implementation of an audio signal processing system in software
1) Analysis of interface to the CoDec and creation of a system reading in and writing out samples (copy-machine)
2) Development of a N-stage averaging mean filter working on the samples
3) Development of a simple echo producer working in the time domain
4) Measurement and optimization of the system since it reaches the performance limit of standard microcontrollers

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Realization of the example system as a HW/SW system with input of parameter values for echo and FIR filter unit
1) System partition HW/SW
2) Protocoll specification between HW and SW components
3) Realization of User Interface (Input of echo and filter parameters, general system control)
4) Realization of protocoll components
5) Validation with FPGA Board
6) Comparison of solutions HW / SW / SoPC in report

Type	Attendance (h/Wk.)
Practical training	1
Tutorial (voluntary)	0